XC3S5000-5FGG676C Datasheet, PDF (51/272 Pages) Xilinx, Inc – Introduction and Ordering Information

X-Ref Target - Figure 29
Spartan-3 FPGA Family: Functional Description
Power-On
Set PROG_B Low
after Power-On
V_CCINT >1V
and V_CCAUX > 2V
No
and V_CCO Bank 4 > 1V
Yes
Clear configuration
memory
Yes _{PROG_B = Low}
No
No
INIT_ B = High?
Yes
Sample mode pins
Load configuration
data frames
CRC
No
correct?
Yes
Start-Up
sequence
User mode
INIT_B goes Low.
Abort Start-Up
No
Yes
Reconfigure?
DS099_26_041103
Figure 29: Configuration Flow Diagram for the Serial and Parallel Modes
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
51