XC3S5000-5FGG676C Datasheet, PDF (124/272 Pages) Xilinx, Inc – Introduction and Ordering Information

Spartan-3 FPGA Family: Pinout Descriptions
Table 79: Pin Behavior After Power-Up, During Configuration (Cont’d)
Pin Name
Configuration Mode Settings <M2:M1:M0>
Serial Modes
SelectMap Parallel Modes
Master <0:0:0> Slave <1:1:1> Master <0:1:1> Slave <1:1:0>
JTAG Mode
<1:0:1>
Bitstream
Configuration
Option
JTAG: JTAG interface pins (pull-up resistor to VCCAUX always active during configuration, regardless of HSWAP_EN pin)
TDI
TDI (I)
TDI (I)
TDI (I)
TDI (I)
TDI (I)
TdiPin
TMS
TMS (I)
TMS (I)
TMS (I)
TMS (I)
TMS (I)
TmsPin
TCK
TCK (I)
TCK (I)
TCK (I)
TCK (I)
TCK (I)
TckPin
TDO
TDO (O)
TDO (O)
TDO (O)
TDO (O)
TDO (O)
TdoPin
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
124