XC3S5000-5FGG676C Datasheet, PDF (34/272 Pages) Xilinx, Inc – Introduction and Ordering Information

Spartan-3 FPGA Family: Functional Description
DLL Clock Input Connections
An external clock source enters the FPGA using a Global Clock Input Buffer (IBUFG), which directly accesses the global
clock network or an Input Buffer (IBUF). Clock signals within the FPGA drive a global clock net using a Global Clock
Multiplexer Buffer (BUFGMUX). The global clock net connects directly to the CLKIN input. The internal and external
connections are shown in the [a] and [c] sections, respectively, of Figure 21. A differential clock (e.g., LVDS) can serve as an
input to CLKIN.
DLL Clock Output and Feedback Connections
As many as four of the nine DCM clock outputs can simultaneously drive the four BUFGMUX buffers on the same die edge
(top or bottom). All DCM clock outputs can simultaneously drive general routing resources, including interconnect leading to
OBUF buffers.
The feedback loop is essential for DLL operation and is established by driving the CLKFB input with either the CLK0 or the
CLK2X signal so that any undesirable clock distribution delay is included in the loop. It is possible to use either of these two
signals for synchronizing any of the seven DLL outputs: CLK0, CLK90, CLK180, CLK270, CLKDV, CLK2X, or CLK2X180.
The value assigned to the CLK_FEEDBACK attribute must agree with the physical feedback connection: a value of 1X for
the CLK0 case, 2X for the CLK2X case. If the DCM is used in an application that does not require the DLL—i.e., only the
DFS is used—then there is no feedback loop so CLK_FEEDBACK is set to NONE.
CLK2X feedback is only supported on all mask revision ‘E’ and later devices (see Mask and Fab Revisions, page 58), on
devices with the "GQ" fabrication code, and on all versions of the XC3S50 and XC3S1000.
There are two basic cases that determine how to connect the DLL clock outputs and feedback connections: on-chip
synchronization and off-chip synchronization, which are illustrated in Figure 21.
DS099 (v3.1) June 27, 2013
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Product Specification
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