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XC3S5000-5FGG676C Datasheet, PDF (268/272 Pages) Xilinx, Inc – Introduction and Ordering Information
Spartan-3 FPGA Family: Pinout Descriptions
All Devices
12
DUAL: Configuration pin, then
possible user I/O
16
DCI: User I/O or reference
resistor input for bank
Top Right Corner of FG1156 Package
(Top View)
8
GCLK: User I/O or global clock
buffer input
7
CONFIG: Dedicated
configuration pins
4
JTAG: Dedicated JTAG port pins
104
VCCO: Output voltage supply
for bank
40
VCCINT: Internal core voltage
supply (+1.2V)
32
VCCAUX: Auxiliary voltage
supply (+2.5V)
184 GND: Ground
Bank 1
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
I/O
GND
I/O
I/O
L40N_1 L26N_1
GND
I/O
I/O
I/O
L19N_1 L15N_1 L14N_1
GND
I/O
L08N_1
I/O
L34N_1

I/O
L05N_1
GND
I/O
L02N_1
I/O
L01N_1
VRP_1
GND
GND A
I/O
L32N_1
GCLK5
I/O
L28N_1
I/O
L40P_1
I/O
VCCO_1 I/O
L26P_1
L19P_1
I/O
L15P_1
I/O
L14P_1
I/O
I/O
L08P_1
I/O
L34P_1

I/O
I/O
L05P_1 L03N_1
I/O
L02P_1
I/O
L01P_1
VRN_1
GND
GND B
I/O
L32P_1
GCLK4
I/O
L28P_1
I/O
L39N_1
I/O
L25N_1
I/O
L22N_1
I/O
GND
I/O
L13N_1
I/O
L10N_1
VREF_1
VCCO_1
I/O
L33N_1

I/O
L04N_1
I/O
VCCO_1
L03P_1
GND
I/O
I/O
C L01N_2 L01P_2
VRP_2 VRN_2
I/O
L31N_1
VREF_1
VCCO_1
I/O
L39P_1
I/O
L25P_1
I/O
L22P_1
I/O
VCCO_1 I/O
L18N_1
L13P_1
I/O
L10P_1
I/O
L07N_1
I/O
L33P_1

I/O
L04P_1
IO
VREF_1
TCK
VCCO_2 I/O
I/O D
L02N_2 L02P_2
I/O
L31P_1
GND VCCAUX
I/O
GND
I/O
VCCAUX
L18P_1
I/O
GND
I/O
L07P_1
I/O
L06N_1 VCCAUX
VREF_1
GND
TDO
I/O
L03N_2
VREF_2
I/O
L03P_2
GND
E
I/O
I/O
L27N_1
I/O
L38N_1
I/O
L24N_1
I/O
VCCO_1 L17N_1
VREF_1
I/O
L36N_1

I/O
L12N_1
I/O
L09N_1
I/O
I/O
I/O
VCCAUX I/O
I/O
I/O
I/O F
L06P_1
L04N_2 L04P_2 L41N_2 L41P_2
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
L36P_1
I/O
I/O
VCCO_1 GND
I/O
I/O
L42N_2 L42P_2 I/O
L30N_1 L27P_1 L38P_1 L24P_1 L21N_1 L17P_1

L12P_1 L09P_1
L05N_2 L05P_2


I/O G
I/O
VCCAUX VCCO_1 I/O
I/O
I/O
VCCO_1 I/O
I/O
L30P_1
L23N_1 L21P_1
L11N_1
TMS
VCCO_2 I/O
L06N_2
I/O
L06P_2
I/O
L09N_2 VCCO_2
VREF_2
I/O
L07N_2
I/O
L07P_2
H
I/O
GND
I/O
I/O
I/O
GND
I/O
L35N_1
I/O
I/O
L29N_1
L37N_1 L23P_1
L16N_1

L11P_1

I/O
I/O
I/O
L11N_2 L08N_2 L08P_2
GND
I/O
I/O
I/O
L09P_2 L10N_2 L10P_2
GND
J
I/O
I/O
L29P_1
IO
VREF_1 I/O
I/O
L37P_1
IO
I/O
VREF_1 L20N_1
I/O
L16P_1
I/O
L35P_1

GND
I/O
L11P_2
I/O
L12N_2
I/O
L12P_2
I/O
L13N_2
I/O
L13P_2
VREF_2
I/O
L14N_2
I/O
L14P_2
I/O
L15N_2
I/O K
L15P_2
I/O
I/O
I/O
I/O
L20P_1

I/O
I/O
I/O
I/O
L16N_2
I/O
L16P_2
VCCO_2
L17N_2
L17P_2
VREF_2 VCCAUX VCCO_2
GND
I/O
I/O L
L45N_2 L45P_2


VCCINT VCCO_1 VCCO_1 VCCO_1 VCCO_1 VCCINT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O M
L46N_2 L46P_2 L21N_2 L47N_2 L47P_2 L19N_2 L19P_2 L20N_2 L20P_2 L48N_2 L48P_2
GND
GND
VCCINT VCCINT VCCINT VCCINT
VCCO_2 I/O
L24N_2
GND
GND
GND
VCCINT
VCCO_2 I/O
L24P_2
I/O
L21P_2
I/O
L49N_2

GND
I/O
L49P_2

I/O
L22N_2
I/O
L50N_2
I/O
VCCO_2
L22P_2
GND
I/O
L23N_2
VREF_2
I/O
L23P_2
VCCO_2
GND
N
I/O
I/O
I/O
I/O
I/O
I/O
I/O P
L50P_2 L26N_2 L26P_2 L27N_2 L27P_2 L28N_2 L28P_2
GND
GND
GND
GND
GND
GND
GND
GND
GND
R GND
VCCINT
VCCO_2 I/O
L29N_2
I/O
L29P_2
I/O
L33N_2
VCCO_2 I/O
L30N_2
I/O
VCCAUX I/O
L30P_2
L31N_2
I/O
L31P_2
I/O
L32N_2
I/O
L32P_2
GND
VCCINT
VCCO_2
I/O
L51N_2

I/O
L33P_2
GND
VCCAUX
I/O
L34N_2
VREF_2
I/O
L34P_2
GND
VCCO_2 I/O
I/O
L35N_2 L35P_2
GND
T
GND
I/O
GND VCCINT L51P_2 I/O

I/O
I/O
L37N_2
I/O
I/O
L37P_2 L38N_2
I/O
I/O
L38P_2 L39N_2
I/O
L39P_2
U I/O
L40N_2
I/O
L40P_2
VREF_2
Figure 58: FG1156 Package Footprint (Top View) Continued
DS099-4_14b_072903
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
268