XC3S5000-5FGG676C Datasheet, PDF (5/272 Pages) Xilinx, Inc – Introduction and Ordering Information

Spartan-3 FPGA Family: Introduction and Ordering Information
Table 3 shows the number of user I/Os as well as the number of differential I/O pairs available for each device/package
combination.
Table 3: Spartan-3 Device I/O Chart
Package
VQ100
VQG100
Available User I/Os and Differential (Diff) I/O Pairs by Package Type
CP132⁽¹⁾ TQ144
PQ208
FT256
FG320
FG456
FG676
CPG132 TQG144 PQG208 FTG256 FGG320 FGG456 FGG676
FG900
FGG900
FG1156⁽¹⁾
FGG1156
Footprint
(mm)
16 x 16
8x8
22 x 22 30.6 x 30.6 17 x 17 19 x 19 23 x 23 27 x 27 31 x 31
35 x 35
Device User Diff User Diff User Diff User Diff User Diff User Diff User Diff User Diff User Diff User Diff
XC3S50
63 29 89⁽¹⁾ 44⁽¹⁾ 97 46 124 56 –
–
–
–
–
–
–
–
–
–
–
–
XC3S200 63 29 –
XC3S400 – – –
XC3S1000 – – –
XC3S1500 – – –
XC3S2000 – – –
XC3S4000 – – –
XC3S5000 – – –
– 97 46 141 62 173 76 – – – – – – – –
–
–
– 97 46 141 62 173 76 221 100 264 116 – – – –
–
–
–
– – – – 173 76 221 100 333 149 391 175 – –
–
–
–
– – – – – – 221 100 333 149 487 221 – –
–
–
–
– – – – – – – – 333 149 489 221 565 270 –
–
–
–
–
–
–
–
–
–
–
–
– 489 221 633 300 712⁽¹⁾ 312⁽¹⁾
–
–
–
–
–
–
–
–
–
–
– 489 221 633 300 784⁽¹⁾ 344⁽¹⁾
Notes:
1. The CP132, CPG132, FG1156, and FGG1156 packages are discontinued. See
http://www.xilinx.com/support/documentation/spartan-3_customer_notices.htm.
2. All device options listed in a given package column are pin-compatible.
3. User = Single-ended user I/O pins. Diff = Differential I/O pairs.
Package Marking
Figure 2 shows the top marking for Spartan-3 FPGAs in the quad-flat packages. Figure 3 shows the top marking for
Spartan-3 FPGAs in BGA packages except the 132-ball chip-scale package (CP132 and CPG132). The markings for the
BGA packages are nearly identical to those for the quad-flat packages, except that the marking is rotated with respect to the
ball A1 indicator. Figure 4 shows the top marking for Spartan-3 FPGAs in the CP132 and CPG132 packages.
The “5C” and “4I” part combinations may be dual marked as “5C/4I”. Devices with the dual mark can be used as either -5C
or -4I devices. Devices with a single mark are only guaranteed for the marked speed grade and temperature range. Some
specifications vary according to mask revision. Mask revision E devices are errata-free. All shipments since 2006 have been
mask revision E.
X-Ref Target - Figure 2
Mask Revision Code
Device Type
Package
Speed Grade
Temperature Range
R
SPARTAN ^R
XC3S400 ^TM
PQ208EGQ0525
D1234567A
4C
Fabrication Code
Process Technology
Date Code
Lot Code
Pin P1
DS099-1_03_050305
Figure 2: Spartan-3 FPGA QFP Package Marking Example for Part Number XC3S400-4PQ208C
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
5