XC3S5000-5FGG676C Datasheet, PDF (62/272 Pages) Xilinx, Inc – Introduction and Ordering Information

Spartan-3 FPGA Family: DC and Switching Characteristics
Table 34: Quiescent Supply Current Characteristics
Symbol
Description
Device
I_CCINTQ
Quiescent V_CCINT supply current
I_CCOQ
Quiescent V_CCO supply current
I_CCAUXQ
Quiescent V_CCAUX supply current
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
Typical⁽¹⁾
5
10
15
35
45
60
100
120
1.5
1.5
1.5
2.0
2.5
3.0
3.5
3.5
7
10
15
20
35
45
55
70
Commercial
Maximum⁽¹⁾
24
54
110
160
260
360
450
600
2.0
3.0
3.0
4.0
4.0
5.0
5.0
5.0
20
30
40
50
75
90
110
130
Industrial
Maximum⁽¹⁾
31
80
157
262
332
470
810
870
2.5
3.5
3.5
5.0
5.0
6.0
6.0
6.0
22
33
44
55
85
100
125
145
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Notes:
1. The numbers in this table are based on the conditions set forth in Table 32. Quiescent supply current is measured with all I/O drivers in a
high-impedance state and with all pull-up/pull-down resistors at the I/O pads disabled. Typical values are characterized using devices with
typical processing at room temperature (T_J of 25°C at V_CCINT = 1.2V, V_CCO = 3.3V, and V_CCAUX = 2.5V). Maximum values are the
production test limits measured for each device at the maximum specified junction temperature and at maximum voltage limits with
V_CCINT = 1.26V, V_CCO = 3.465V, and V_CCAUX = 2.625V. The FPGA is programmed with a "blank" configuration data file (i.e., a design with
no functional elements instantiated). For conditions other than those described above, (e.g., a design including functional elements, the use
of DCI standards, etc.), measured quiescent current levels may be different than the values in the table. Use the XPower Estimator or
XPower Analyzer for more accurate estimates. See Note 2.
2. There are two recommended ways to estimate the total power consumption (quiescent plus dynamic) for a specific design: a) The Spartan-3
XPower Estimator provides quick, approximate, typical estimates, and does not require a netlist of the design. b) XPower Analyzer, part of
the Xilinx ISE development software, uses the FPGA netlist as input to provide more accurate maximum and typical estimates.
3. The maximum numbers in this table also indicate the minimum current each power rail requires in order for the FPGA to power-on
successfully, once all three rails are supplied. If V_CCINT is applied before V_CCAUX, there may be temporary additional I_CCINT current until
V_CCAUX is applied. See Surplus I_CCINT if V_CCINT Applied before V_CCAUX, page 54
DS099 (v3.1) June 27, 2013
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Product Specification
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