XC3S5000-5FGG676C Datasheet, PDF (68/272 Pages) Xilinx, Inc – Introduction and Ordering Information

Spartan-3 FPGA Family: DC and Switching Characteristics
Switching Characteristics
All Spartan-3 devices are available in two speed grades: –4 and the higher performance –5. Switching characteristics in this
document may be designated as Advance, Preliminary, or Production. Each category is defined as follows:
Advance: These specifications are based on simulations only and are typically available soon after establishing FPGA
specifications. Although speed grades with this designation are considered relatively stable and conservative, some
under-reported delays may still occur.
Preliminary: These specifications are based on complete early silicon characterization. Devices and speed grades with this
designation are intended to give a better indication of the expected performance of production silicon. The probability of
under-reporting preliminary delays is greatly reduced compared to Advance data.
Production: These specifications are approved once enough production silicon of a particular device family member has
been characterized to provide full correlation between speed files and devices over numerous production lots. There is no
under-reporting of delays, and customers receive formal notification of any subsequent changes. Typically, the slowest
speed grades transition to Production before faster speed grades.
Production-quality systems must use FPGA designs compiled using a Production status speed file. FPGAs designs using a
less mature speed file designation may only be used during system prototyping or preproduction qualification. FPGA
designs using Advance or Preliminary status speed files should never be used in a production-quality system.
Whenever a speed file designation changes, as a device matures toward Production status, rerun the Xilinx ISE software on
the FPGA design to ensure that the FPGA design incorporates the latest timing information and software updates.
Xilinx ISE Software Updates: http://www.xilinx.com/support/download/index.htm
All specified limits are representative of worst-case supply voltage and junction temperature conditions. Unless otherwise
noted, the following applies: Parameter values apply to all Spartan-3 devices. All parameters representing voltages are
measured with respect to GND.
Selected timing parameters and their representative values are included below either because they are important as general
design requirements or they indicate fundamental device performance characteristics. The Spartan-3 FPGA v1.38 speed
files are the original source for many but not all of the values. The v1.38 speed files are available in Xilinx Integrated Software
Environment (ISE) software version 8.2i.
The speed grade designations for these files are shown in Table 39. For more complete, more precise, and worst-case data,
use the values reported by the Xilinx static timing analyzer (TRACE in the Xilinx development software) and back-annotated
to the simulation netlist.
Table 39: Spartan-3 FPGA Speed Grade Designations (ISE v8.2i or Later)
Device
Advance
Preliminary
Production
XC3S50
-4, -5 (v1.37 and later)
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
-4, -5 (v1.38 and later)
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
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