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XC3S5000-5FGG676C Datasheet, PDF (76/272 Pages) Xilinx, Inc – Introduction and Ordering Information
Spartan-3 FPGA Family: DC and Switching Characteristics
Table 46: Timing for the IOB Three-State Path
Symbol
Description
Conditions
Synchronous Output Enable/Disable Times
TIOCKHZ
Time from the active transition at the
OTCLK input of the Three-state Flip-Flop
(TFF) to when the Output pin enters the
high-impedance state
LVCMOS25, 12 mA
output drive, Fast slew
rate
TIOCKON(2)
Time from the active transition at TFF’s
OTCLK input to when the Output pin drives
valid data
Asynchronous Output Enable/Disable Times
TGTS
Time from asserting the Global Three State LVCMOS25, 12 mA
(GTS) net to when the Output pin enters the output drive, Fast slew
high-impedance state
rate
Set/Reset Times
TIOSRHZ
Time from asserting TFF’s SR input to when LVCMOS25, 12 mA
the Output pin enters a high-impedance output drive, Fast slew
state
rate
TIOSRON(2)
Time from asserting TFF’s SR input at TFF
to when the Output pin drives valid data
Device
All
All
XC3S200
XC3S400
XC3S50
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
All
XC3S200
XC3S400
XC3S50
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
Speed Grade
-5
-4
Max(3) Max(3)
Units
0.74
0.85
ns
0.72
0.82
ns
7.71
8.87
ns
8.38
9.63
ns
1.55
1.78
ns
2.24
2.57
ns
2.91
3.34
ns
Notes:
1. The numbers in this table are tested using the methodology presented in Table 48 and are based on the operating conditions set forth in
Table 32 and Table 35.
2. This time requires adjustment whenever a signal standard other than LVCMOS25 with 12 mA drive and Fast slew rate is assigned to the data
Output. When this is true, add the appropriate Output adjustment from Table 47.
3. For minimums, use the values reported by the Xilinx timing analyzer.
Table 47: Output Timing Adjustments for IOB
Convert Output Time from LVCMOS25 with 12mA Drive and Fast Slew Rate to the
Following Signal Standard (IOSTANDARD)
Single-Ended Standards
GTL
GTL_DCI
GTLP
GTLP_DCI
HSLVDCI_15
HSLVDCI_18
Add the Adjustment Below
Speed Grade
-5
-4
Units
0
0.02
ns
0.13
0.15
ns
0.03
0.04
ns
0.23
0.27
ns
1.51
1.74
ns
0.81
0.94
ns
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
76