XC3S5000-5FGG676C Datasheet, PDF (164/272 Pages) Xilinx, Inc – Introduction and Ordering Information

Spartan-3 FPGA Family: Pinout Descriptions
FT256 Footprint
X-Ref Target - Figure 49
1
A GND
Bank 0
2
3
4
5
6
7
TDI
IO
I/O
VREF_0 ^L01P_0
I/O VCCAUX I/O
VRN_0
Bank 1
8
9 10 11 12 13 14 15
I/O
L32P_0 I/O
GCLK6
I/O
L31N_1 VCCAUX I/O
VREF_1
I/O
I/O
L10N_1 L01N_1 TDO
VREF_1 VRP_1
16
GND
I/O
B L01P_7
VRN_7
GND
I/O
PROG_B L01N_0
VRP_0
I/O
L25P_0
I/O
L28P_0
I/O
L30P_0
I/O
L32N_0
GCLK7
GND
I/O
L31P_1
I/O
L29N_1
I/O
L27N_1
I/O
L10P_1
I/O
L01P_1
VRN_1
GND
I/O
L01N_2
VRP_22
C
I/O
L01N_7
VRP_7
I/O
L16N_7
I/O
L16P_7
VREF_7
HSWAP_
EN
I/O
L25N_0
I/O
L28N_0
I/O
L30N_0
I/O
L31P_0
VREF_0
I/O
L32N_1
GCLK5
I/O
I/O
I/O
L29P_1 L27P_1
TMS
TCK
I/O
L16N_2
I/O
L01P_2
VRN_22
D
I/O
L17N_7
I/O
L17P_7
I/O
L19P_7
VCCINT
IO
VREF_0
I/O
L27P_0
I/O
L29P_0
I/O
L31N_0
I/O
L32P_1
GCLK4
I/O
L30N_1
I/O
L28N_1
IO
VREF_1
VCCINT
I/O
L16P_2
I/O
L17N_2
I/O
L17P_2
VREF_2
E
I/O
L20N_7
I/O
L20P_7
I/O
L19N_7
VREF_7
I/O
L21P_7
VCCINT
I/O
L27N_0
I/O
L29N_0
VCCO_0
VCCO_1
I/O
L30P_1
I/O
L28P_1
VCCINT
I/O
L19N_2
I/O
L19P_2
I/O
L20N_2
I/O
L20P_2
F
VCCAUX
I/O
L22N_7
I/O
L22P_7
I/O
L21N_7
I/O
L23P_7
GND ^{VCCO_0 VCCO_0 VCCO_1 VCCO_1}
GND
I/O
L21N_2
I/O
L21P_2
I/O
L22N_2
I/O
L22P_2
VCCAUX
G
I/O
L40P_7
I/O
I/O
I/O
I/O _{VCCO_7}
L24N_7 L24P_7 L23N_7
GND
GND
GND
GND
I/O
VCCO_2 L23N_2
VREF_2
I/O
L23P_2
I/O
L24N_2
I/O
L24P_2
I/O
I/O
H L40N_7
VREF_7
GND
I/O
L39N_7
I/O
L39P_7
VCCO_7
VCCO_7
GND
GND
GND
GND
VCCO_2 VCCO_2
I/O
L39N_2
I/O
L39P_2
I/O
L40N_2
I/O
L40P_2
VREF_2
I/O
J L40P_6
VREF_6
I/O
I/O
L40N_6 L39P_6
I/O
L39N_6
VCCO_6 VCCO_6
GND
GND
GND
GND
VCCO_3 VCCO_3
I/O
L39P_3
I/O
L39N_3
I/O
GND L40N_3
VREF_3
K
I/O
I/O
L24P_6
I/O
L24N_6
VREF_6
I/O
L23P_6
I/O _{VCCO_6}
L23N_6
GND
GND
GND
GND VCCO_3 ^I/O
I/O
I/O
L23N_3 L24P_3 L24N_3
I/O
I/O
L40P_3
L
VCCAUX
I/O
L22P_6
I/O
L22N_6
I/O
L21P_6
I/O
L21N_6
GND
VCCO_5 VCCO_5 VCCO_4 VCCO_4
GND
I/O
L23P_3
VREF_3
I/O
L21N_3
I/O
L22P_3
I/O
L22N_3
VCCAUX
M
I/O
L20P_6
I/O
L20N_6
I/O
L19P_6
I/O
L19N_6
I/O
VCCINT L28P_5
D7
I/O
L30P_5
VCCO_5 VCCO_4
I/O
I/O L27N_4
L29N_4 DIN
D0
VCCINT
I/O
L21P_3
I/O
L19N_3
I/O
L20P_3
I/O
L20N_3
N
I/O
L17P_6
VREF_6
I/O
L17N_6
I/O
L16P_6
VCCINT
I/O
I/O
L28N_5
D6
I/O
L30N_5
I/O
I/O
L32P_5 L31N_4
GCLK2 INIT_B
I/O
L29P_4
I/O
L27P_4
D1
IO
VREF_4
VCCINT
I/O
L19P_3
I/O
L17P_3
VREF_3
I/O
L17N_3
P
I/O
L01P_6
VRN_6
I/O
L16N_6
M0
M2
I/O
L27P_5
I/O
L29P_5
VREF_5
I/O
I/O
L32N_5
GCLK3
I/O
L31P_4
DOUT
BUSY
I/O
L30N_4
D2
I/O
L28N_4
I/O
IO
L25N_4 VREF_4
I/O
L16P_3
I/O
L16N_3
I/O
L01N_3
VRP_33
I/O
R L01N_6
VRP_6
GND
I/O
L01P_5
CS_B
I/O
L10P_5
VRN_5
I/O
L27N_5
VREF_5
I/O
L29N_5
I/O
L31P_5
D5
GND
I/O
I/O
L32N_4 L30P_4
GCLK1 D3
I/O
L28P_4
I/O
L25P_4
I/O
L01N_4
VRP_4
DONE
GND
I/O
L01P_3
VRN_33
T GND
I/O
I/O
M1 L01N_5 L10N_5
RDWR_B VRP_5
I/O
I/O
VCCAUX L31N_5
IO
VREF_5
I/O
L32P_4
IO
VREF_4
VCCAUX
I/O
D4
GCLK0
I/O
L01P_4 I/O
VRN_4
CCLK GND
Bank 5
Bank 4
Figure 49: FT256 Package Footprint (Top View)
DS099-4_10_030503
113 I/O: Unrestricted, general-purpose user I/O
12
DUAL: Configuration pin, then possible
user I/O
24
VREF: User I/O or input voltage reference
for bank
16
DCI: User I/O or reference resistor input for
bank
8
GCLK: User I/O or global clock buffer input 24 VCCO: Output voltage supply for bank
7 CONFIG: Dedicated configuration pins
4 JTAG: Dedicated JTAG port pins
8
VCCINT: Internal core voltage supply
(+1.2V)
0 N.C.: No unconnected pins in this package 32 GND: Ground
8
VCCAUX: Auxiliary voltage supply
(+2.5V)
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
164