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XC3S5000-5FGG676C Datasheet, PDF (49/272 Pages) Xilinx, Inc – Introduction and Ordering Information
Spartan-3 FPGA Family: Functional Description
(e.g. all configuration pins taken together) when operating in the User mode. This is accomplished by setting the Persist
option to Yes.
Multiple FPGAs can be configured using the Slave Parallel mode and can be made to start-up simultaneously. Figure 27
shows the device connections. To configure multiple devices in this way, wire the individual CCLK, Data, RDWR_B, and
BUSY pins of all the devices in parallel. The individual devices are loaded separately by deasserting the CS_B pin of each
device in turn and writing the appropriate data.
X-Ref Target - Figure 27
D[0:7]
CCLK
RDWR_B
BUSY
2.5V
2.5V
VCCO Banks 4 & 5
VCCAUX VCCINT
1.2V
Spartan-3
Slave
VCCO Banks 4 & 5
VCCAUX VCCINT
1.2V
Spartan-3
Slave
D[0:7]
D[0:7]
CCLK
CCLK
RDWR_B
RDWR_B
CS_B
2.5V
4.7KΩ
4.7KΩ
BUSY
CS_B
PROG_B
2.5V
M1
M2
M0
DONE INIT_B
GND
CS_B
BUSY
CS_B
PROG_B
2.5V
M1
M2
M0
DONE INIT_B
GND
DONE
INIT_B
Notes:
PROG_B
DS099_24_041103
1. There are two ways to use the DONE line. First, one may set the BitGen option DriveDone to "Yes" only for the last FPGA to be
configured in the chain shown above (or for the single FPGA as may be the case). This enables the DONE pin to drive High; thus,
no pull-up resistor is necessary. DriveDone is set to "No" for the remaining FPGAs in the chain. Second, DriveDone can be set to
"No" for all FPGAs. Then all DONE lines are open-drain and require the pull-up resistor shown in grey. In most cases, a value
between 3.3KΩ to 4.7KΩ is sufficient. However, when using DONE synchronously with a long chain of FPGAs, cumulative
capacitance may necessitate lower resistor values (e.g. down to 330Ω) in order to ensure a rise time within one clock cycle.
2. If the FPGAs use different configuration data files, configure them in sequence by first asserting the CS_B of one FPGA then
asserting the CS_B of the other FPGA.
3. For information on how to program the FPGA using 3.3V signals and power, see 3.3V-Tolerant Configuration Interface.
Figure 27: Connection Diagram for Slave Parallel Configuration
DS099 (v3.1) June 27, 2013
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Product Specification
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