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XC3S5000-5FGG676C Datasheet, PDF (15/272 Pages) Xilinx, Inc – Introduction and Ordering Information
Spartan-3 FPGA Family: Functional Description
Table 8: Single-Ended I/O Standards
Signal Standard
(IOSTANDARD)
VCCO (Volts)
For Outputs
For Inputs
GTL
Note 2
Note 2
GTLP
Note 2
Note 2
HSTL_I
1.5
–
HSTL_III
1.5
–
HSTL_I_18
1.8
–
HSTL_II_18
1.8
–
HSTL_III_18
1.8
–
LVCMOS12
1.2
1.2
LVCMOS15
1.5
1.5
LVCMOS18
1.8
1.8
LVCMOS25
2.5
2.5
LVCMOS33
3.3
3.3
LVTTL
3.3
3.3
PCI33_3
3.0
3.0
SSTL18_I
1.8
–
SSTL18_II
1.8
–
SSTL2_I
2.5
–
SSTL2_II
2.5
–
VRE(FVofoltrsI)n(1p) uts
0.8
1
0.75
0.9
0.9
0.9
1.1
–
–
–
–
–
–
–
0.9
0.9
1.25
1.25
Board Termination
Voltage (VTT) in Volts
1.2
1.5
0.75
1.5
0.9
0.9
1.8
–
–
–
–
–
–
–
0.9
0.9
1.25
1.25
Notes:
1. Banks 4 and 5 of any Spartan-3 device in a VQ100 package do not support signal standards using VREF.
2. The VCCO level used for the GTL and GTLP standards must be no lower than the termination voltage (VTT), nor can it be lower than the
voltage at the I/O pad.
3. See Table 10 for a listing of the single-ended DCI standards.
Differential standards employ a pair of signals, one the opposite polarity of the other. The noise canceling (e.g.,
Common-Mode Rejection) properties of these standards permit exceptionally high data transfer rates. This section
introduces the differential signaling capabilities of Spartan-3 devices.
Each device-package combination designates specific I/O pairs that are specially optimized to support differential
standards. A unique “L-number”, part of the pin name, identifies the line-pairs associated with each bank (see Figure 40,
page 112). For each pair, the letters ‘P’ and ‘N’ designate the true and inverted lines, respectively. For example, the pin
names IO_L43P_7 and IO_L43N_7 indicate the true and inverted lines comprising the line pair L43 on Bank 7. The VCCO
lines provide current to the outputs. The VCCAUX lines supply power to the differential inputs, making them independent of
the VCCO voltage for an I/O bank. The VREF lines are not used. Select the VCCO level to suit the desired differential standard
according to Table 9.
DS099 (v3.1) June 27, 2013
www.xilinx.com
Product Specification
15