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HD6417034 Datasheet, PDF (77/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034 | |||
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Table 2.17 System Control Instructions (cont)
Instruction
Instruction Code
Operation
Execution
Cycles
T Bit
STS MACL,Rn 0000nnnn00011010 MACL â Rn
1
â
STS PR,Rn
0000nnnn00101010 PR â Rn
1
â
STS.L MACH,@â 0100nnnn00000010 Rnâ4 â Rn, MACH â (Rn) 1
â
Rn
STS.L MACL,@â 0100nnnn00010010 Rnâ4 â Rn, MACL â (Rn) 1
â
Rn
STS.L PR,@âRn 0100nnnn00100010 Rnâ4 â Rn, PR â (Rn)
1
â
TRAPA #imm
11000011iiiiiiii PC/SR â stack area,
8
â
(imm à 4 + VRR) â PC
Note:
The execution cycles shown in the table are minimums.
The actual number of cycles may be increased:
1. When contention occurs between instruction fetches and data access
2. When the destination register of the load instruction (memory â register) and the
register used by the next instruction are the same.
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