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HD6417034 Datasheet, PDF (510/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034
(2) Control Signal Timing
Table 20.5 Control Signal Timing
Case A: VCC = 3.0 to 5.5 V, AVCC = 3.0 to 5.5 V, AVCC = VCC ±10%, AVref = 3.0 V to AVCC,
VSS = AVSS = 0 V, Ta = –20 to +75°C*)
Case B: VCC = 5.0 V ±10%, AVCC = 5.0 V ±10%, AVCC = VCC ±10%, AVref = 4.5 V to AVCC,
VSS = AVSS = 0 V, Ta = –20 to +75°C*)
Note: * Regular-specification products; for wide-temperature-range products, Ta = –40 to +85°C
Case A
12.5 MHz
Item
Symbol Min Max
RES setup time
tRESS
320
—
RES pulse width
tRESW 20
—
NMI reset setup time
tNMIRS 320
—
NMI reset hold time
tNMIRH 320
—
NMI setup time
tNMIS
160
—
NMI hold time
tNMIH
80
—
IRQ0–IRQ7 setup time (edge tIRQES 160
—
detection)
IRQ0–IRQ7 setup time (level tIRQLS 160
—
detection)
IRQ0–IRQ7 hold time
tIRQEH 80
—
IRQOUT output delay time
tIRQOD —
80
Bus request setup time
tBRQS 80
—
Bus acknowledge delay time 1 tBACD1 —
80
Bus acknowledge delay time 2 tBACD2 —
80
Bus 3-state delay time
tBZD
—
80
Case B
20 MHz
Min
Max
200
—
20
—
200
—
200
—
100
—
50
—
100
—
100
—
50
—
—
50
50
—
—
50
—
50
—
50
Unit Figure
ns 20.4
tcyc
ns
ns
ns 20.5
ns
ns
ns
ns
ns 20.6
ns 20.7
ns
ns
ns
474