HD6417034 Datasheet, PDF (624/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034

A.2.24 DMA Source Address Registers 0–3 (SAR0–SAR3)
DMAC
• Start Address: H'5FFFF40 (channel 0), H'5FFFF50 (channel 1), H'5FFFF60 (channel 2),
H'5FFFF70 (channel 3)
• Bus Width: 16/32
Register Overview:
Bit: 31
30
29
28
27
26
25
24
Bit name:
Initial value: *
*
*
*
*
*
*
*
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 23
22
21
20
19
18
17
16
Bit name:
Initial value: *
*
*
*
*
*
*
*
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15
Bit name:
Initial value: *
R/W: R/W
14
*
R/W
13
*
R/W
12
11
10
9
*
*
*
*
R/W R/W R/W R/W
8
*
R/W
Bit: 7
Bit name:
Initial value: *
R/W: R/W
Note: * Undetermined
6
*
R/W
5
*
R/W
4
*
R/W
3
*
R/W
2
*
R/W
1
*
R/W
0
*
R/W
Table A.25 SAR0–SAR3 Bit Functions
Bit
31–0
Bit name
Description
(Specifies transfer source address) Specifies the address of the DMA transfer source
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