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HD6417034 Datasheet, PDF (529/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034
Table 20.7 Bus Timing (2)
Conditions: VCC = 3.0 to 5.5 V, AVCC = 3.0 to 5.5 V, AVCC = VCC ±10%, AVref = 3.0 V to
AVCC, VSS = AVSS = 0 V, φ = 12.5 MHz, Ta = –20 to +75°C*
Note: * Regular-specification products; for wide-temperature-range products, Ta = –40 to +85°C
Item
Symbol Min
Max Unit Figures
Address delay time
tAD
—
40 ns 20.21, 20.22, 20.24–
20.27, 20.32, 20.33
CS delay time 1
tCSD1 —
40 ns 20.21, 20.22, 20.33
CS delay time 2
tCSD2 —
40 ns
CS delay time 3
tCSD3 —
40 ns 20.32
CS delay time 4
tCSD4 —
40 ns
Access time 1*4 35% duty*1 tRDAC1 tcyc × 0.65 – 35
from read strobe 50% duty
tcyc × 0.5 – 35
— ns 20.21,
— ns
Access time 2*4 35% duty*1 tRDAC2 tcyc × (n+1.65) – 35*2 —
from read strobe 50% duty
tcyc × (n+1.5) – 35*2 —
ns 20.22, 20.23
ns
Access time 3*4 35% duty*1 tRDAC3 tcyc × (n+0.65) – 35*2 —
from read strobe 50% duty
tcyc × (n+0.5) – 35*2 —
ns 20.32
ns
Read strobe delay time
tRSD
—
40 ns 20.21, 20.22,
20.24–20.28, 20.32
Read data setup time
Read data hold time
Write strobe delay time 1
tRDS
25
tRDH
0
tWSD1 —
— ns 20.21, 20.22,
— ns 20.24-20.27, 20.32
40 ns 20.22, 20.26, 20.27,
20.32, 20.33
Write strobe delay time 2 tWSD2 —
30 ns 20.22, 20.26, 20.27,
20.32
Write strobe delay time 3
Write strobe delay time 4
Write data delay time 1
tWSD3 —
tWSD4 —
tWDD1 —
40 ns 20.24, 20.25
40 ns 20.24, 20.25, 20.33
70 ns 20.22, 20.26, 20.27,
20.32
Write data delay time 2
Write data hold time
tWDD2 —
tWDH –10
40 ns 20.24, 20.26
— ns 20.22, 20.24–20.27,
20.32
Parity output delay time 1
Parity output delay time 2
Parity output hold time
tWPDD1 —
tWPDD2 —
tWPDH –10
80 ns 20.22, 20.24, 20.27
40 ns 20.24, 20.25
— ns 20.22, 20.23–20.27
493