HD6417034 Datasheet, PDF (447/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034

Bit: 15
14
13
12
11
10
9
8
ADDRn: AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
ADDRn: AD1 AD0
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
n = A–D
Table 14.3 Assignment of Data Registers to Analog Input Channels
Group 0
AN0
AN1
AN2
AN3
Analog Input Channel
Group 1
AN4
AN5
AN6
AN7
A/D Data Register
ADDRA
ADDRB
ADDRC
ADDRD
14.2.2 A/D Control/Status Register (ADCSR)
The A/D control/status register (ADCSR) is an 8-bit read/write register that controls the operation
of the A/D converter (mode selection, etc.). ADCSR is initialized to H'00 by a reset and in standby
mode.
Bit: 7
6
5
Bit name: ADF ADIE ADST
Initial value: 0
0
0
R/W: R/(W)* R/W R/W
Note: * Only 0 can be written, to clear the flag.
4
SCAN
0
R/W
3
CKS
0
R/W
2
CH2
0
R/W
1
CH1
0
R/W
0
CH0
0
R/W
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