HD6417034 Datasheet, PDF (31/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034

14.7 A/D Converter Usage Notes.............................................................................................. 423
14.7.1 Setting Analog Input Voltage............................................................................... 423
14.7.2 Handling of Analog Input Pins............................................................................. 423
14.7.3 Switchover between Analog Input and General Port Functions .......................... 424
Section 15 Pin Function Controller (PFC).................................................................... 425
15.1 Overview............................................................................................................................ 425
15.2 Register Configuration ...................................................................................................... 427
15.3 Register Descriptions......................................................................................................... 427
15.3.1 Port A I/O Register (PAIOR) ............................................................................... 427
15.3.2 Port A Control Registers (PACR1 and PACR2) .................................................. 428
15.3.3 Port B I/O Register (PBIOR)................................................................................ 433
15.3.4 Port B Control Registers (PBCR1 and PBCR2)................................................... 434
15.3.5 Column Address Strobe Pin Control Register (CASCR) ..................................... 439
Section 16 I/O Ports (I/O).................................................................................................. 441
16.1 Overview............................................................................................................................ 441
16.2 Port A................................................................................................................................. 441
16.2.1 Register Configuration ......................................................................................... 441
16.2.2 Port A Data Register (PADR) .............................................................................. 442
16.3 Port B ................................................................................................................................. 443
16.3.1 Register Configuration ......................................................................................... 443
16.3.2 Port B Data Register (PBDR)............................................................................... 444
16.4 Port C ................................................................................................................................. 445
16.4.1 Register Configuration ......................................................................................... 445
16.4.2 Port C Data Register (PCDR)............................................................................... 446
Section 17 ROM ................................................................................................................... 447
17.1 Overview............................................................................................................................ 447
17.2 PROM Mode...................................................................................................................... 448
17.2.1 Setting PROM Mode............................................................................................ 448
17.2.2 Socket Adapter Pin Correspondence and Memory Map ...................................... 448
17.3 PROM Programming ......................................................................................................... 450
17.3.1 Selecting the Programming Mode........................................................................ 450
17.3.2 Write/Verify and Electrical Characteristics.......................................................... 451
17.3.3 Notes on Writing .................................................................................................. 455
17.3.4 Reliability after Writing ....................................................................................... 456
Section 18 RAM ................................................................................................................... 457
18.1 Overview............................................................................................................................ 457
18.2 Operation ........................................................................................................................... 458
ix