HD6417034 Datasheet, PDF (185/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034

T_p
T_r
T_c
CK
A21–A0
Row address Column address
RAS
Byte
control
CASH
CASL
WRH
WRL
High
Fixed high
(a) Dual CAS signals (CW2 = 0)
T_p
T_r
T_c
CK
A21–A0
Row address Column address
RAS
CASH
CASL
Fixed high
Byte
control
WRH
WRL
High
(b) Dual WE signals (CW2 = 1)
Figure 8.21 Byte Access Control Timing for DRAM Access
(Upper Byte Write Cycle, Short Pitch)
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