HD6417034 Datasheet, PDF (564/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034

Table 20.20 Bus Timing (1) (cont)
Conditions: V_CC = 3.3 V ±0.3V, AV_CC = 3.3 V ±0.3V, AV_CC = V_CC ±0.3V, AV_ref = 3.0 V to
AV_CC, V_SS = AV_SS = 0 V, φ = 20 MHz*¹, Ta = –20 to +75°C*²
Notes: *1 ROMless products
*2 Regular-specification products; for wide-temperature-range products, Ta = –40 to
+85°C
Item
Symbol Min
Max Unit Figures
Write data delay time 1
t_WDD1
—
35
ns 20.53, 20.57, 20.58,
20.63
Write data delay time 2
Write data hold time
Parity output delay time 1
Parity output delay time 2
Parity output hold time
Wait setup time
Wait hold time
Read data access time 1*⁶
Read data access time 2*⁶
t_WDD2
t_WDH
t_WPDD1
t_WPDD2
t_WPDH
t_WTS
t_WTH
t_ACC1
t_ACC2
RAS delay time 1
t_RASD1
RAS delay time 2
t_RASD2
CAS delay time 1
t_CASD1
CAS delay time 2*⁷
t_CASD2
CAS delay time 3*⁷
t_CASD3
Column address setup time t_ASC
Read data access 35% duty*²t_CAC1
time from CAS 1*⁶
50% duty
Read data access time from t_CAC2
CAS 2*⁶
Read data access time from t_RAC1
RAS 1*⁶
Read data access time from t_RAC2
RAS 2*⁶
High-speed page mode CAS t_CP
precharge time
—
20
0
—
—
40
—
20
0
—
10
—
6
—
t_cyc – 30*⁴ —
t_cyc × (n+2) – —
30*³
—
20
—
30
—
20
—
20
—
20
0
—
t_cyc × 0.65 – —
19
t_cyc × 0.5 – 19—
t_cyc × (n+1) – —
25*³
t_cyc × 1.5 – 20—
t_cyc × (n+2.5) —
– 20*³
t_cyc × 0.25 —
ns 20.55, 20.56
ns 20.53, 20.55–20.58
ns 20.53, 20.57, 20.58
ns 20.55, 20.56
ns 20.53, 20.55–20.58
ns 20.54, 20.59, 20.63
ns
ns 20.52, 20.55, 20.56
ns 20.53, 20.54, 20.57–20.59
ns 20.55–20.58,
ns ^{20.60–20.62}
ns 20.55
ns 20.57, 20.58,
ns ^{20.60–20.62}
ns 20.55, 20.56
ns
ns
ns 20.57–20.59
ns 20.55, 20.56
ns 20.57–20.59
ns 20.56
528