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HD6417034 Datasheet, PDF (545/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034
(5) 16-bit Integrated Timer Pulse Unit Timing
Table 20.9 16-bit Integrated Timer Pulse Unit Timing
Case A: VCC = 3.0 to 5.5 V, AVCC = 3.0 to 5.5 V, AVCC = VCC ±10%, AVref = 3.0 V to AVCC,
VSS = AVSS = 0 V, Ta = –20 to +75°C*
Case B: VCC = 5.0 V ±10%, AVCC = 5.0 V ±10%, AVCC = VCC ±10%, AVref = 4.5 V to AVCC,
VSS = AVSS = 0 V, Ta = –20 to +75°C*
Note: * Regular-specification products; for wide-temperature-range products, Ta = –40 to +85°C
Item
Output compare delay time
Input capture setup time
Timer clock input setup time
Timer clock pulse width
(single edge)
Timer clock pulse width
(both edges)
Symbol
tTOCD
tTICS
tTCKS
tTCKWH/L
tTCKWL/L
Case A
12.5 MHz
Min Max
—
100
50
—
50
—
1.5
—
Case B
20 MHz
Min
Max
—
100
35
—
50
—
1.5
—
Unit
ns
ns
ns
tcyc
Figure
20.36
20.37
2.5
—
2.5
—
tcyc
CK
Output
compare*1
Input
capture*2
tTOCD
tTICS
Notes: *1 TIOCA0–TIOCA4, TIOCB0–TIOCB4, TOCXA4, TOCXB4
*2 TIOCA0–TIOCA4, TIOCB0–TIOCB4
Figure 20.36 ITU Input/Output Timing
509