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HD6417034 Datasheet, PDF (651/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034 | |||
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A.2.47 Refresh Timer Control/Status Register (RTCSR)
BSC
⢠Start Address: H'5FFFFAE
⢠Bus Width: 8/16/32 (read), 16 (write)
Register Overview:
Bit: 15
14
13
12
11
10
9
8
Bit name: â
â
â
â
â
â
â
â
Initial value: 0
0
0
0
0
0
0
0
R/W: â
â
â
â
â
â
â
â
Bit: 7
6
5
4
3
2
1
0
Bit name: CMF CMIE CKS2 CKS1 CKS0
â
â
â
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W
â
â
â
Table A.48 RSTCR Bit Functions
Bit Bit Name
Value Description
7 Compare match flag (CMF) 0
RTCNT and RTCOR values do not match(Initial value)
Clear Condition: CMF read, then 0 written in CMF
1
RTCNT and RTCOR values match
6 Compare match interrupt 0
enable (CMIE)
1
Compare match interrupt (CMI) disabled (Initial value)
Compare match interrupt (CMI) enabled
5â3 Clock select 2â0 (CKS2â
CKS0)
0 0 0 Clock input disabled
0 0 1 Ï/2
(Initial value)
0 1 0 Ï/8
0 1 1 Ï/32
1 0 0 Ï/128
1 0 1 Ï/512
1 1 0 Ï/2048
1 1 1 Ï/4096
615
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