HD6417034 Datasheet, PDF (671/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034

A.2.64 TPC Output Mode Register (TPMR)
• Start Address: H'5FFFFF0
• Bus Width: 8/16
Register Overview:
Bit: 7
6
5
4
Bit name: —
—
—
—
Initial value: 1
1
1
1
R/W: —
—
—
—
TPC
3
2
1
0
G3NOV G2NOV G1NOV G0NOV
0
0
0
0
R/W R/W R/W R/W
Table A.65 TPMR Bit Functions
Bit Bit Name
Value Description
3 Group 3 non-
0
overlap (G3NOV)
TPC output group 3 operates normally (the output value is
updated at every compare match A of the selected ITU)
(Initial value)
1
TPC output group 3 operates in non-overlap mode (1 output and
0 output can be performed independently upon compare
matches A and B of the selected ITU)
2 Group 2 non-
0
overlap (G2NOV)
TPC output group 2 operates normally (the output value is
updated at every compare match A of the selected ITU)
(Initial value)
1
TPC output group 2 operates in non-overlap mode (1 output and
0 output can be performed independently upon compare
matches A and B of the selected ITU)
1 Group 1 non-
0
overlap (G1NOV)
TPC output group 1 operates normally (the output value is
updated at every compare match A of the selected ITU)
(Initial value)
1
TPC output group 1 operates in non-overlap mode (1 output and
0 output can be performed independently upon compare
matches A and B of the selected ITU)
0 Group 0 non-
0
overlap (G0NOV)
TPC output group 0 operates normally (the output value is
updated at every compare match A of the selected ITU)
(Initial value)
1
TPC output group 0 operates in non-overlap mode (1 output and
0 output can be performed independently upon compare
matches A and B of the selected ITU)
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