HD6417034 Datasheet, PDF (143/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034

8.2 Register Descriptions
8.2.1 Bus Control Register (BCR)
The bus control register (BCR) is a 16-bit read/write register that selects the functions of areas and
status of bus cycles. It is initialized to H'0000 by a power-on reset, but is not initialized by a
manual reset or in standby mode.
Bit: 15
14
13
12
11
10
9
8
Bit name: DRAME IOE WARP RDDTY BAS
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W
—
—
—
Bit: 7
6
5
4
3
2
1
0
Bit name: —
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: —
—
—
—
—
—
—
—
• Bit 15 (DRAM Enable Bit (DRAME)): DRAME selects whether area 1 is used as an external
memory space or DRAM space. 0 sets it as external memory space and 1 sets it as DRAM
space. The setting of the DRAM area control register is valid only when this bit is set to 1.
Bit 15: DRAME
0
1
Description
Area 1 is external memory space
Area 1 is DRAM space
(Initial value)
• Bit 14 (Multiplexed I/O Enable Bit (IOE)): IOE selects whether area 6 is used as external
memory space or an address/data multiplexed I/O area. 0 sets it as external memory space and
1 sets it as address/data multiplexed I/O space. With address/data multiplexed I/O space, the
address and data are multiplexed and input/output is from AD15–AD0.
Bit 14: IOE
0
1
Description
Area 6 is external memory space
Area 6 is an address/data multiplexed I/O area
(Initial value)
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