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HD6417034 Datasheet, PDF (586/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034
(8) Serial Communication Interface Timing
Table 20.25 Serial Communication Interface Timing
Conditions: VCC = 3.3 V ±0.3V, AVCC = 3.3 V ±0.3V, AVCC = VCC ±0.3V, AVref = 3.0 V to
AVCC, VSS = AVSS = 0 V, φ = 12.5 to 20 MHz*1, Ta = –20 to +75°C*2
Notes: *1 ROMless products only for 20 MHz version
*2 Regular-specification products; for wide-temperature-range products, Ta = –40 to
+85°C
Item
Symbol
Min
Max
Unit Figure
Input clock cycle
Input clock cycle (synchronous mode)
Input clock pulse width
Input clock rise time
Input clock fall time
Transmit data delay time (synchronous
mode)
tscyc
tscyc
tSCKW
tSCKr
tSCKf
tTXD
4
—
tcyc 20.71
6
—
tcyc
0.4
0.6
tscyc
—
1.5
tcyc
—
1.5
tcyc
—
100
ns 20.72
Receive data setup time (synchronous
tRXS
mode)
100
—
ns
Receive data hold time (synchronous
mode)
tRXH
100
—
ns
tSCKW
tSCKr
tSCKf
SCK0, SCK1
tscyc
Figure 20.71 Input Clock Timing
550