HD6417034 Datasheet, PDF (625/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034

A.2.25 DMA Destination Address Registers 0–3 (DAR0–DAR3)
DMAC
• Start Address: H'5FFFF44 (channel 0), H'5FFFF54 (channel 1), H'5FFFF64 (channel 2),
H'5FFFF74 (channel 3)
• Bus Width: 16/32
Register Overview:
Bit: 31
30
29
28
27
26
25
24
Bit name:
Initial value: *
*
*
*
*
*
*
*
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 23
22
21
20
19
18
17
16
Bit name:
Initial value: *
*
*
*
*
*
*
*
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15
14
13
12
11
10
9
8
Bit name:
Initial value: *
*
*
*
*
*
*
*
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
Bit name:
Initial value: *
*
*
*
*
*
*
*
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Note: * Undetermined
Table A.26 DAR0–DAR3 Bit Functions
Bit
31–0
Bit name
(Specifies transfer destination
address)
Description
Specifies the address of the DMA transfer destination
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