HD6417034 Datasheet, PDF (682/691 Pages) Renesas Technology Corp – SuperH RISC ENGINE SH7032 AND SH7034

Appendix B Pin States
Table B.1 Pin State In Resets, Power-Down State, and Bus-Released State
Category
Pin
Clock
CK
System control
RES
WDTOVF
BREQ
BACK
Interrupt
NMI
IRQ7–IRQ0
IRQOUT
Address bus
A21–A0
Data bus
AD15–AD0
DPH,DPL
Bus control
WAIT
CS7
CS6–CS0
RD
WRH (LBS),WRL
(WR)
RAS
CASH,CASL
AH
Direct memory access DREQ0,DREQ1
controller (DMAC)
DACK0,DACK1
16-bit integrated timer TIOCA0–TIOCA4
pulse unit (ITU)
TIOCB0–TIOCB4
TOCXA4,
TOCXB4
TCLKA–TCLKD
Timing pattern
controller (TPC)
TP15–TP0
Pin State
Reset
Power-Down _Bus
Power-On Manual Standby Sleep Released
O
O
H*¹
O
O
I
I
I
I
I
H
H
H*¹
O
O
—
I
Z
I
I
Z
O
Z
O
L
I
I
I
I
I
—
I
Z
I
I
—
O
O*¹
H
O
H
O
Z
H
Z
Z
Z
Z
Z
Z
—
Z
Z
Z
Z
I
I*²
Z
I*²
I*²
—
O
Z
H
Z
Z
O
Z
H
Z
H
O
Z
H
Z
H
O
Z
H
Z
—
O
O*¹
O
Z
—
O
O
O
Z
—
O
Z
H
Z
—
I
Z
I
I
Z
O
K*¹
O
O
—
I
K*¹
I/O I/O
—
I
K*¹
I/O I/O
—
I
K*¹
O
O
—
I
Z
I
I
—
I
K*¹
O
O
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