EP2S180F1020C4 Datasheet, PDF (758/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Termination Schemes
Figure 11–27 shows the active parallel fly-by termination scheme.
Figure 11–27. Active Parallel Fly-By Termination
VBIAS
Receiver/Load
RT = Zo
Source
Zo = 50 Ω
Pad
Series-RC Parallel Termination
A series-RC parallel termination scheme uses a resistor and capacitor
(series-RC) network as the terminating impedance. R_T is equal to Z₀. The
capacitor must be large enough to filter the constant flow of DC current.
For data patterns with long strings of 1 or 0, this termination scheme may
delay the signal beyond the design thresholds, depending on the size of
the capacitor.
Capacitors smaller than 100 pF diminish the effectiveness of termination.
The capacitor blocks low-frequency signals while passing high-frequency
signals. Therefore, the DC loading effect of R_T does not have an impact on
the driver, as there is no DC path to ground. The series-RC termination
scheme requires balanced DC signaling, the signals spend half the time
on and half the time off. AC termination is typically used if there is more
than one load (see Figure 11–28).
Figure 11–28. Series-RC Parallel Termination
Stub
S
Zo= 50 Ω
L
RT = Zo
C
11–22
Stratix II Device Handbook, Volume 2
Altera Corporation
May 2007