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EP2S180F1020C4 Datasheet, PDF (394/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1 | |||
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Read-During-Write Operation at the Same Address
Figure 2â21. Stratix II and Stratix II GX Same-Port Read-During-Write
Functionality Note (1)
inclock
data
A
B
wren
q Old
A
Note to Figure 2â21:
(1) Outputs are not registered.
Mixed-Port Read-During-Write Mode
This mode is used when a RAM in simple or true dual-port mode has one
port reading and the other port writing to the same address location with
the same clock.
The READ_DURING_WRITE_MODE_MIXED_PORTS parameter for M512
and M4K memory blocks determines whether to output the old data at
the address or a âdonât careâ value. Setting this parameter to OLD_DATA
outputs the old data at that address. Setting this parameter to DONT_CARE
outputs a âdonât careâ or unknown value. Figures 2â22 and 2â23 show
sample functional waveforms where both ports have the same address.
These figures assume that the outputs are not registered.
The DONT_CARE setting allows memory implementation in any TriMatrix
memory block, whereas the OLD_DATA setting restricts memory
implementation to only M512 or M4K memory blocks. Selecting
DONT_CARE gives the compiler more flexibility when placing memory
functions into TriMatrix memory.
The RAM outputs are unknown for a mixed-port read-during-write
operation of the same address location of an M-RAM block, as shown in
Figure 2â23.
2â34
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008
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