EP2S180F1020C4 Datasheet, PDF (275/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

PLLs in Stratix II and Stratix II GX Devices
Table 1–4. Enhanced PLL Input Signals (Part 2 of 2)
Port
areset
pfdena
scanclk
scandata
scanwrite
scanread
Description
Source
Signal used to reset the PLL which
resynchronizes all the counter
outputs. Active high.
Logic array
Enables the outputs from the phase Logic array
frequency detector. Active high.
Serial clock signal for the real-time Logic array
PLL reconfiguration feature.
Serial input data stream for the real- Logic array
time PLL reconfiguration feature.
Enables writing the data in the scan Logic array
chain into the PLL. Active high.
Enables scan data to be written into Logic array
the scan chain. Active high.
Destination
General PLL control
signal
PFD
Reconfiguration circuit
Reconfiguration circuit
Reconfiguration circuit
Reconfiguration circuit
Table 1–5. Enhanced PLL Output Signals (Part 1 of 2)
Port
c[5..0]
pll_out [2..0]p
pll_out [2..0]n
clkloss
clkbad[1..0]
locked
activeclock
Description
Source
PLL output counters driving regional, PLL counter
global or external clocks.
These are three differential or six
single-ended external clock output
pins fed from the C[5..0] PLL
counters, and every output can be
driven by any counter. p and n are
the positive (p) and negative (n) pins
for differential pins.
PLL counter
Signal indicating the switch-over
circuit detected a switch-over
condition.
PLL switch-over
circuit
Signals indicating which reference
clock is no longer toggling.
clkbad1 indicates inclk1
status, clkbad0 indicates
inclk0 status. 1= good; 0=bad
PLL switch-over
circuit
Lock or gated lock output from lock PLL lock detect
detect circuit. Active high.
Signal to indicate which clock
(0 = inclk0 or 1 = inclk1) is
driving the PLL. If this signal is low,
inclk0 drives the PLL, If this signal
is high, inclk1 drives the PLL
PLL clock
multiplexer
Destination
Internal or external clock
Pin(s)
Logic array
Logic array
Logic array
Logic array
Altera Corporation
July 2009
1–11
Stratix II Device Handbook, Volume 2