EP2S180F1020C4 Datasheet, PDF (488/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

I/O Banks
Table 5–1 lists the differential I/O standards supported by each bank.
Table 5–1. Supported Differential I/O Types
Bank
Row I/O (Banks 1, 2, 5 and 6) (2)
Column I/O (Banks, 3, 4 and 7 through 12)
Type
Clock Inputs
Differential HSTL
Differential SSTL
LVPECL
LVDS
v
HyperTransport
v
technology
Clock
Outputs
v
v
Data or
Regular I/O
Pins
v
v
Clock Inputs
v
v
v
v
Clock
Outputs
v
v
v
v
Data or
Regular I/O
Pins
(1)
(1)
Note to Table 5–1:
(1) Used as both inputs and outputs on the DQS/DQSn pins.
(2) Banks 5 and 6 are not available in Stratix II GX devices.
Table 5–2 shows the total number of differential channels available in
Stratix II devices. The available channels are divided evenly between the
left and right banks of the die. Non-dedicated clocks in the left and right
banks can also be used as data receiver channels. The total number of
receiver channels includes these four non-dedicated clock channels. Pin
migration is available for different size devices in the same package.
Table 5–2. Differential Channels in Stratix II Devices (Part 1 of 2) Notes (1), (2), and (3)
Device
EP2S15
EP2S30
EP2S60
EP2S90
EP2S130
484-Pin 484-Pin Hybrid 672-Pin
FineLine BGA FineLine BGA FineLine BGA
780-Pin
FineLine BGA
1,020-Pin
FineLine BGA
1,508-Pin
FineLine BGA
Within the
1,508-pin Fin
38 transmitters
42 receivers
38 transmitters
42 receivers
38 transmitters
42 receivers
58 transmitters
62 receivers
38 transmitters
42 receivers
58 transmitters
62 receivers
84 transmitters
84 receivers
38 transmitters
42 receivers
64 transmitters 90 transmitters 118 transmitters
68 receivers 94 receivers 118 receivers
64 transmitters 88 transmitters 156 transmitters
68 receivers 92 receivers 156 receivers
5–4
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008