EP2S180F1020C4 Datasheet, PDF (150/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Operating Conditions
Table 5–4. Stratix II Device DC Operating Conditions (Part 2 of 2) Note (1)
Symbol
Parameter
Conditions
I_CCI00
V_CCIO supply current
(standby)
R_CONF (4) Value of I/O pin pull-up
resistor before and
during configuration
V_I = ground, no
load, no toggling
inputs
T_J = 25° C
EP2S15
EP2S30
EP2S60
EP2S90
EP2S130
EP2S180
Vi = 0; V_CCIO = 3.3 V
Vi = 0; V_CCIO = 2.5 V
Vi = 0; V_CCIO = 1.8 V
Vi = 0; V_CCIO = 1.5 V
Vi = 0; V_CCIO = 1.2 V
Recommended value of
I/O pin external
pull-down resistor before
and during configuration
Minimum Typical Maximum Unit
4.0
(3)
mA
4.0
(3)
mA
4.0
(3)
mA
4.0
(3)
mA
4.0
(3)
mA
4.0
(3)
mA
10
25
50
kΩ
15
35
70
kΩ
30
50
100
kΩ
40
75
150
kΩ
50
90
170
kΩ
1
2
kΩ
Notes to Table 5–4:
(1) Typical values are for T_A = 25°C, V_CCINT = 1.2 V, and V_CCIO = 1.5 V, 1.8 V, 2.5 V, and 3.3 V.
(2) This value is specified for normal device operation. The value may vary during power-up. This applies for all
V_CCIO settings (3.3, 2.5, 1.8, and 1.5 V).
(3) Maximum values depend on the actual T_J and design utilization. See the Excel-based PowerPlay Early Power
Estimator (available at www.altera.com) or the Quartus II PowerPlay Power Analyzer feature for maximum
values. See the section “Power Consumption” on page 5–20 for more information.
(4) Pin pull-up resistance values are lower if an external source drives the pin higher than V_CCIO.
I/O Standard Specifications
Tables 5–5 through 5–32 show the Stratix II device family I/O standard
specifications.
Table 5–5. LVTTL Specifications (Part 1 of 2)
Symbol
V_CCIO (1)
V_{I H}
V_IL
V_OH
Parameter
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Conditions
I_OH = –4 mA (2)
Minimum
3.135
1.7
–0.3
2.4
Maximum Unit
3.465
V
4.0
V
0.8
V
V
5–4
Stratix II Device Handbook, Volume 1
Altera Corporation
April 2011