EP2S180F1020C4 Datasheet, PDF (201/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

DC & Switching Characteristics
Table 5–73. Stratix II I/O Input Delay for Column Pins (Part 2 of 3)
I/O Standard Parameter
1.5-V HSTL
Class II
t_{P I}
t_{P C O U T}
1.8-V HSTL
Class I
t_{P I}
t_{P C O U T}
1.8-V HSTL
Class II
t_{P I}
t_{P C O U T}
PCI
t_{P I}
t_{P C O U T}
PCI-X
t_{P I}
t_{P C O U T}
Differential
SSTL-2 Class I
(1)
t_{P I}
t_{P C O U T}
Differential
SSTL-2 Class II
(1)
t_{P I}
t_{P C O U T}
Differential
SSTL-18 Class I
(1)
t_{P I}
t_{P C O U T}
Differential
t_{P I}
SSTL-18 Class II
(1)
t_{P C O U T}
1.8-V Differential t_{P I}
HSTL Class I (1) _{tP C O U T}
1.8-V Differential t_{P I}
HSTL Class II (1) _{tP C O U T}
1.5-V Differential t_{P I}
HSTL Class I (1) _{tP C O U T}
1.5-V Differential t_{P I}
HSTL Class II (1) _{tP C O U T}
Minimum Timing
Industrial Commercial
-3 Speed
Grade
(2)
-3 Speed
Grade
(3)
-4 Speed
Grade
-5 Speed
Grade
Unit
560
587
993
1041
1141
1329 ps
294
308
557
584
640
746
ps
543
569
898
941
1031
1201 ps
277
290
462
484
530
618
ps
543
569
898
941
1031
1201 ps
277
290
462
484
530
618
ps
679
712
1214
1273
1395
1625 ps
413
433
778
816
894
1042 ps
679
712
1214
1273
1395
1625 ps
413
433
778
816
894
1042 ps
507
530
818
857
939
1094 ps
241
251
382
400
438
511
ps
507
530
818
857
939
1094 ps
241
251
382
400
438
511
ps
543
569
898
941
1031
1201 ps
277
290
462
484
530
618
ps
543
569
898
941
1031
1201 ps
277
290
462
484
530
618
ps
543
569
898
941
1031
1201 ps
277
290
462
484
530
618
ps
543
569
898
941
1031
1201 ps
277
290
462
484
530
618
ps
560
587
993
1041
1141
1329 ps
294
308
557
584
640
746
ps
560
587
993
1041
1141
1329 ps
294
308
557
584
640
746
ps
Altera Corporation
April 2011
5–55
Stratix II Device Handbook, Volume 1