EP2S180F1020C4 Datasheet, PDF (705/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

IEEE 1149.1 (JTAG) Boundary-Scan Testing for Stratix II and Stratix II GX Devices
During the capture phase, multiplexers preceding the capture registers
select the active device data signals. This data is then clocked into the
capture registers. The multiplexers at the outputs of the update registers
also select active device data to prevent functional interruptions to the
device. During the shift phase, the boundary-scan shift register is formed
by clocking data through capture registers around the device periphery
and then out of the TDO pin. The device can simultaneously shift new test
data into TDI and replace the contents of the capture registers. During the
update phase, data in the capture registers is transferred to the update
registers. This data can then be used in the EXTEST instruction mode.
Refer to “EXTEST Instruction Mode” on page 9–13 for more information.
Figure 9–9 shows the SAMPLE/PRELOAD waveforms. The
SAMPLE/PRELOAD instruction code is shifted in through the TDI pin. The
TAP controller advances to the CAPTURE_DR state and then to the
SHIFT_DR state, where it remains if TMS is held low. The data that was
present in the capture registers after the capture phase is shifted out of the
TDO pin. New test data shifted into the TDI pin appears at the TDO pin
after being clocked through the entire boundary-scan register. Figure 9–9
shows that the instruction code at TDI does not appear at the TDO pin
until after the capture register data is shifted out. If TMS is held high on
two consecutive TCK clock cycles, the TAP controller advances to the
UPDATE_DR state for the update phase.
Figure 9–9. SAMPLE/PRELOAD Shift Data Register Waveforms
TCK
TMS
TDI
TDO
SHIFT_IR
TAP_STATE
EXIT1_IR SELECT_DR
Instruction Code
UPDATE_IR CAPTURE_DR
Data stored in
boundary-scan
register is shifted
out of TDO.
SHIFT_DR
After boundary-scan EXIT1_DR
register data has been _{UPDATE_DR}
shifted out, data
entered into TDI will
shift out of TDO.
EXTEST Instruction Mode
The EXTEST instruction mode is used primarily to check external pin
connections between devices. Unlike the SAMPLE/PRELOAD mode,
EXTEST allows test data to be forced onto the pin signals. By forcing
known logic high and low levels on output pins, opens and shorts can be
detected at pins of any device in the scan chain.
Altera Corporation
January 2008
9–13
Stratix II Device Handbook, Volume 2