EP2S180F1020C4 Datasheet, PDF (465/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Selectable I/O Standards in Stratix II and Stratix II GX Devices
Table 4–4. Stratix II and Stratix II GX I/O Standards and Voltage Levels (Part 3 of 3) Note (1)
Stratix II and Stratix II GX
V_CCIO (V)
I/O Standard
Input Operation
Output Operation
Top and
Bottom I/O
Banks
Left and
Right I/O
Banks (3)
Top and
Bottom I/O
Banks
Left and
Right I/O
Banks(3)
HyperTransport
NA
2.5
NA
2.5
technology
Differential LVPECL 3.3/2.5/1.8/1.5
NA
3.3
NA
(2)
V_REF (V)
V_TT (V)
Input Termination
NA
NA
NA
NA
Notes to Table 4–4:
(1) Any input pins with PCI-clamping diode will clamp the V_CCIO to 3.3 V.
(2) LVDS and LVPECL output operation in the top and bottom banks is only supported in PLL banks 9-12. The V_CCIO
level for differential output operation in the PLL banks is 3.3 V. The V_CCIO level for output operation in the left and
right I/O banks is 2.5 V.
(3) The right I/O bank does not apply to the Stratix II GX. The right I/O Bank on Stratix II GX devices consists of
transceivers.
(4) 1.2-V HSTL is only supported in I/O banks 4,7, and 8.
f
Refer to the DC & Switching Characteristics chapter in volume 1 of the
Stratix II Device Handbook or the DC & Switching Characteristics chapter in
volume 1 of the Stratix II GX Device Handbook for detailed electrical
characteristics of each I/O standard.
On-Chip
Termination
f
Stratix II and Stratix II GX devices feature on-chip termination to provide
I/O impedance matching and termination capabilities. Apart from
maintaining signal integrity, this feature also minimizes the need for
external resistor networks, thereby saving board space and reducing
costs.
Stratix II and Stratix II GX devices support on-chip series (R_S) and
parallel (R_T) termination for single-ended I/O standards and on-chip
differential termination (R_D) for differential I/O standards. This section
discusses the on-chip series termination support.
For more information on differential on-chip termination, Refer to the
High-Speed Differential I/O Interfaces with DPA in Stratix II & Stratix II GX
Devices chapter in volume 2 of the Stratix II Device Handbook or the
High-Speed Differential I/O Interfaces with DPA in Stratix II & Stratix II GX
Devices chapter in volume 2 of the Stratix II GX Device Handbook.
Altera Corporation
January 2008
4–27
Stratix II Device Handbook, Volume 2