EP2S180F1020C4 Datasheet, PDF (683/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Remote System Upgrades with Stratix II and Stratix II GX Devices
Table 8–8. Interface Signals between Remote System Upgrade Circuitry and FPGA Logic Array (Part 3
of 3)
Signal Name
RU_DIN
RU_DOUT
Signal Direction
Description
Input to remote system
upgrade block (driven by
FPGA logic array)
Data to be written to the remote system upgrade shift register
on the rising edge of RU_CLK. To load data into the shift
register, RU_SHIFTnLD must be asserted.
Output from remote system Output data from the remote system upgrade shift register to
upgrade block (driven to be read by logic array logic. New data arrives on each rising
FPGA logic array)
edge of RU_CLK.
f
Remote System Upgrade Pin Descriptions
Table 8–9 describes the dedicated remote system upgrade configuration
pins.
For descriptions of all the configuration pins, refer to the Configuring
Stratix II & Stratix II GX Devices chapter in volume 2 of the Stratix II
Handbook and the Configuring Stratix II & Stratix II GX Devices chapter in
volume 2 of the Stratix II GX Handbook.
Altera Corporation
January 2008
8–23
Stratix II Device Handbook, Volume 2