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EP2S180F1020C4 Datasheet, PDF (565/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1
Configuring Stratix II and Stratix II GX Devices
Table 7–7 shows the configuration mode support for banks 4, 7, and 8.
Table 7–7. Stratix II Configuration Mode Support for Banks 4, 7 and 8
Configuration Mode
Configuration Voltage/VCCI O Support for Banks 4, 7, and 8
3.3/3.3
1.8/1.8
3.3/1.8
Fast passive parallel
Passive parallel asynchronous
Passive serial
Remote system upgrade FPP
Remote system upgrade PPA
Remote system upgrade PS
Fast AS (40 MHz)
Remote system upgrade fast AS (40 MHz)
FPP with decompression and/or design
security
Remote system upgrade FPP with
decompression and/or design security
feature enabled
AS (20 MHz)
Remote system upgrade AS (20 MHz)
VCCSEL = GND
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
VCCSEL = VCCPD
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
VCCSEL = GND
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Output Configuration Pins
You must verify that the configuration output pins for your chosen
configuration modes meet the VIH of the configuration device. Refer to
Table 7–22 on page 7–94 for a consolidated list of configuration output
pins.
The VIH of 3.3 V or 2.5 V configuration devices will not be met when the
VCCIO of the output configuration pins are 1.8 V or 1.5 V. Level shifters
will be required to meet the input high level voltage threshold VIH.
Note that AS mode is only applicable for 3.3-V configurations. If I/O
bank 3 is less than 3.3 V, level shifters are required on the output pins
(DCLK, nCSO, ASDO) from the Stratix II or Stratix II GX device back to the
EPCS device.
Altera Corporation
January 2008
7–13
Stratix II Device Handbook, Volume 2