EP2S180F1020C4 Datasheet, PDF (384/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Altera Corporation
January 2008
2–24
Stratix II Device Handbook, Volume 2
Note to Figure 2–13:
(1) Violating the setup or hold time on the memory block address registers could
corrupt the memory contents. This applies to both read and write operations.
Figure 2–13. Stratix II and Stratix II GX Input/Output Clock Mode in True
Dual-Port Mode Note (1)
Clock Modes