EP2S180F1020C4 Datasheet, PDF (634/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Passive Parallel Asynchronous Configuration
Figure 7–34 shows the timing waveform for the PPA configuration
scheme when using a strobed nRS and nWS signal.
Figure 7–34. Stratix II and Stratix II GX PPA Configuration Timing Waveform Using nRS and nWS Note (1)
t_CFG
nCONFIG
t_CF2ST1
(2) nSTATUS
t_CF2SCD
(3) CONF_DONE
(4) nCS
(4) CS
DATA[7..0]
nWS
nRS
INIT_DONE
User I/O
(6) DATA7/RDYnBSY
t_STATUS
t_CSH
t_CSSU
t_DH
Byte 0 Byte 1
t_DSU
Byte n
t_WSP
t_WS2RS
t_CF2WS
High-Z
t_RS2WS
t_WS2RS
tRSD7
t_RDY2WS
t_WS2B
t_BUSY
(5)
(5)
(5)
(5)
(5)
User-Mode
(5)
t_CD2UM
Notes to Figure 7–34:
(1) The beginning of this waveform shows the device in user-mode. In user-mode, nCONFIG, nSTATUS and
CONF_DONE are at logic high levels. When nCONFIG is pulled low, a reconfiguration cycle begins.
(2) Upon power-up, Stratix II and Stratix II GX devices hold nSTATUS low for the time of the POR delay.
(3) Upon power-up, before and during configuration, CONF_DONE is low.
(4) The user can toggle nCS or CS during configuration if the design meets the specification for t_CSSU, t_WSP, and t_CSH.
(5) DATA[7..0], CS, nCS, nWS, nRS, and RDYnBSY are available as user I/O pins after configuration and the state of
theses pins depends on the dual-purpose pin settings.
(6) DATA7 is a bidirectional pin. It is an input for configuration data input, but it is an output to show the status of
RDYnBSY.
Table 7–18 defines the timing parameters for Stratix II and Stratix II GX
devices for PPA configuration.
Table 7–18. PPA Timing Parameters for Stratix II and Stratix II GX Devices (Part 1 of 2)
Symbol
Parameter
t_CF2CD
t_CF2ST0
nCONFIG low to CONF_DONE low
nCONFIG low to nSTATUS low
Min
Max
800
800
Units
ns
ns
7–82
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008