EP2S180F1020C4 Datasheet, PDF (542/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Operational Modes
signals. The accum_sload signal can be used to clear the accumulator so
that a new accumulation operation can begin without losing any clock
cycles. This signal can be unregistered or registered once or twice. The
accum_sload signal can also be used to preload the accumulator with a
value specified on the accum_sload_upper_data signal with a one
clock cycle penalty. The accum_sload_upper_data signal only loads
the upper 36-bits (bits [51..16] of the accumulator). To load the entire
accumulator, the value for the lower 16-bits (bits [15..0]) must be sent
through the multiplier feeding that accumulator with the multiplier set to
perform a multiplication by one. Bits [17..16] are overlapped by both
the accum_sload_upper_data signal and the multiplier output. Either
one of these signals can be used to load bits [17..16].
The overflow signal indicates an overflow or underflow in the
accumulator. This signal gets updated every clock cycle due to a new
accumulation operation every cycle. To preserve the signal, an external
latch can be used. The addnsub signal can be used to specify if an
accumulation or subtraction is performed dynamically.
1 The DSP block can implement just an accumulator (without
multiplication) by specifying a multiply by one at the multiplier
stage followed by an accumulator to force the Quartus II
software to implement the function within the DSP block.
Multiply Add Mode
In multiply add mode, the output of the multiplier stage feeds the
adder/output block which is configured as an adder or subtractor to sum
or subtract the outputs of two or more multipliers. The DSP block can be
configured to implement either a two-multiply add (where the outputs of
two multipliers are added/subtracted together) or a four-multiply add
function (where the outputs of four multipliers are added or subtracted
together).
1 The adder block within the DSP block can only be used if it
follows multiplication operations.
Two-Multiplier Adder
In the two-multiplier adder configuration, the DSP block can implement
four 9-bit or smaller multiplier adders or two 18-bit multiplier adders.
The adders can be configured to take the sum of both multiplier outputs
or the difference of both multiplier outputs. You have the option to vary
the summation/subtraction operation dynamically. These multiply add
functions are useful for applications such as FFTs and complex FIR filters.
Figure 6–11 shows the DSP block configured in the two-multiplier adder
mode.
6–26
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008