EP2S180F1020C4 Datasheet, PDF (573/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Configuring Stratix II and Stratix II GX Devices
Figure 7–5. Multiple-Device FPP Configuration Using an External Host When Both Devices Receive the Same
Data
Memory
ADDR DATA[7..0]
External Host
(MAX II Device or
Microprocessor)
VCC (1) VCC (1)
10 kΩ
10 kΩ
GND
Stratix II Device
MSEL[3..0]
CONF_DONE
nSTATUS
nCE
nCEO
GND
N.C. (2)
DATA[7..0]
nCONFIG
DCLK
GND
Stratix II Device
MSEL[3..0]
CONF_DONE
nSTATUS
nCE
nCEO
GND
N.C. (2)
DATA[7..0]
nCONFIG
DCLK
Notes to Figure 7–5:
(1) The pull-up resistor should be connected to a supply that provides an acceptable input signal for all devices in the
chain. V_CC should be high enough to meet the V_IH specification of the I/O on the device and the external host.
(2) The nCEO pins of both Stratix II or Stratix II GX devices are left unconnected when configuring the same
configuration data into multiple devices.
f
You can use a single configuration chain to configure Stratix II or
Stratix II GX devices with other Altera devices that support FPP
configuration, such as Stratix devices. To ensure that all devices in the
chain complete configuration at the same time or that an error flagged by
one device initiates reconfiguration in all devices, tie all of the device
CONF_DONE and nSTATUS pins together.
For more information on configuring multiple Altera devices in the same
configuration chain, refer to Configuring Mixed Altera FPGA Chains in
volume 2 of the Configuration Handbook.
FPP Configuration Timing
Figure 7–6 shows the timing waveform for FPP configuration when using
a MAX II device as an external host. This waveform shows the timing
when the decompression and the design security feature are not enabled.
Altera Corporation
January 2008
7–21
Stratix II Device Handbook, Volume 2