EP2S180F1020C4 Datasheet, PDF (473/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Selectable I/O Standards in Stratix II and Stratix II GX Devices
Table 4–8. Acceptable Input Levels for LVTTL and LVCMOS (Part 2 of 2)
Bank V_CCIO
(V)
1.8
1.5
3.3
v (2)
v (2)
Acceptable Input Levels (V)
2.5
1.8
v (2)
v
v (2)
v
1.5
v (1)
v
Notes to Table 4–8:
(1) Because the input signal does not drive to the rail, the input buffer does not
completely shut off, and the I/O current is slightly higher than the default value.
(2) These input values overdrive the input buffer, so the pin leakage current is
slightly higher than the default value. To drive inputs higher than V_CCIO but less
than 4.0 V, disable the PCI clamping diode and select the Allow LVTTL and
LVCMOS input levels to overdrive input buffer option in the Quartus II
software.
Voltage-Referenced Standards
To accommodate voltage-referenced I/O standards, each Stratix II or
Stratix II GX device’s I/O bank supports multiple V_REF pins feeding a
common V_REF bus. The number of available V_REF pins increases as device
density increases. If these pins are not used as V_REF pins, they cannot be
used as generic I/O pins. However, each bank can only have a single
V_CCIO voltage level and a single V_REF voltage level at a given time.
An I/O bank featuring single-ended or differential standards can support
voltage-referenced standards as long as all voltage-referenced standards
use the same V_REF setting.
Because of performance reasons, voltage-referenced input standards use
their own V_CCIO level as the power source. For example, you can only
place 1.5-V HSTL input pins in an I/O bank with a 1.5-V V_CCIO.
1
Refer to the “Stratix II and Stratix II GX I/O Banks” on
page 4–20 for details on input V_CCIO for voltage-referenced
standards.
Voltage-referenced bidirectional and output signals must be the same as
the I/O bank’s V_CCIO voltage. For example, you can only place SSTL-2
output pins in an I/O bank with a 2.5-V V_CCIO.
1 Refer to the “I/O Placement Guidelines” on page 4–36 for
details on voltage-referenced I/O standards placement.
Altera Corporation
January 2008
4–35
Stratix II Device Handbook, Volume 2