EP2S180F1020C4 Datasheet, PDF (510/768 Pages) Altera Corporation – Stratix II Device Handbook, Volume 1

Differential Pin Placement Guidelines
Non-DPA Differential I/O Usage Guidelines
When a differential channel or channels of left or right banks are used in
non-DPA mode, you must adhere to the guidelines in the following
sections.
Fast PLL/Differential I/O Driving Distance
■ As shown in Figure 5–24, each fast PLL can drive all the channels in
the entire bank.
Figure 5–24. Fast PLL Driving Capability When Driving Non-DPA Differential
Channels
Fast PLL
Ref CLK
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Corner PLL
Ref CLK
Diff I/O
Diff I/O
Diff I/O
Each PLL Can Drive
the Entire Bank
Diff I/O
Diff I/O
Diff I/O
Diff I/O
Ref CLK
Fast PLL
Ref CLK
Center PLL
5–26
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008