Z8F4822AR020SG Datasheet, PDF (95/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
75
Timer 0–3 PWM High and Low Byte Registers
The Timer 0–3 PWM High and Low Byte (TxPWMH and TxPWML) registers, shown in
Tables 43 and 44, are used for Pulse-Width Modulator (PWM) operations. These registers
also store the capture values for the CAPTURE and CAPTURE/COMPARE modes.
Table 43. Timer 0–3 PWM High Byte Register (TxPWMH)
Bit
7
6
5
4
3
2
1
0
Field
PWMH
RESET
0
R/W
R/W
Address
F04H, F0CH, F14H, F1CH
Table 44. Timer 0–3 PWM Low Byte Register (TxPWML)
Bit
7
6
5
4
3
2
1
0
Field
PWML
RESET
0
R/W
R/W
Address
F05H, F0DH, F15H, F1DH
Bit
[7:0]
PWMH,
PWML
Description
Pulse-Width Modulator High and Low Bytes
These two bytes, {PWMH[7:0], PWML[7:0]}, form a 16-bit value that is compared to the current
16-bit timer count. When a match occurs, the PWM output changes state. The PWM output
value is set by the TPOL bit in the Timer Control 1 Register (TxCTL1) Register. The TxPWMH
and TxPWML registers also store the 16-bit captured timer value when operating in CAPTURE
or CAPTURE/COMPARE modes.
PS019924-0113
PRELIMINARY
Timer Control Register Definitions