Z8F4822AR020SG Datasheet, PDF (172/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
152
Configuring DMA_ADC for Data Transfer
Observe the following procedure to configure and enable the DMA_ADC:
1. Write the DMA_ADC Address Register with the 7 most significant bits of the
Register File address for data transfers.
2. Write to the DMA_ADC Control Register to complete the following operations:
– Enable the DMA_ADC interrupt request, if appropriate
– Select the number of ADC analog inputs to convert
– Enable the DMA_ADC channel
Caution: When using the DMA_ADC to perform conversions on multiple ADC inputs, the Ana-
log-to-Digital Converter must be configured for SINGLE-SHOT Mode. If the ADC_IN
field in the DMA_ADC Control Register is greater than 000b, the ADC must be in SIN-
GLE-SHOT Mode. 

CONTINUOUS Mode operation of the ADC can only be used in conjunction with the
DMA_ADC if the ADC_IN field in the DMA_ADC Control Register is reset to 000b to
enable conversion on ADC analog input 0 only.
DMA Control Register Definitions
This section defines the features of the following DMA Control registers.
DMAx Control Register: see page 153
DMAx I/O Address Register: see page 154
DMAx Address High Nibble Register: see page 155
DMAx Start/Current Address Low Byte Register: see page 156
DMAx End Address Low Byte Register: see page 156
DMA_ADC Address Register: see page 157
DMA_ADC Control Register: see page 158
DMA_ADC Status Register: see page 159
PS019924-0113
PRELIMINARY
DMA Control Register Definitions