Z8F4822AR020SG Datasheet, PDF (45/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
25
Table 7. Z8 Encore! XP F64xx Series Register File Address Map (Continued)
Address (Hex) Register Description
DMA 0 (continued)
FB2
DMA0 End/Start Address High Nibble
FB3
DMA0 Start Address Low Byte
FB4
DMA0 End Address Low Byte
DMA 1
FB8
DMA1 Control
FB9
DMA1 I/O Address
FBA
DMA1 End/Start Address High Nibble
FBB
FBC
DMA1 Start Address Low Byte
DMA1 End Address Low Byte
DMA ADC
FBD
FBE
FBF
DMA_ADC Address
DMA_ADC Control
DMA_ADC Status
Interrupt Controller
FC0
Interrupt Request 0
FC1
IRQ0 Enable High Bit
FC2
IRQ0 Enable Low Bit
FC3
Interrupt Request 1
FC4
IRQ1 Enable High Bit
FC5
IRQ1 Enable Low Bit
FC6
Interrupt Request 2
FC7
IRQ2 Enable High Bit
FC8
IRQ2 Enable Low Bit
FC9–FCC
FCD
Reserved
Interrupt Edge Select
FCE
FCF
Interrupt Port Select
Interrupt Control
GPIO Port A
FD0
Port A Address
FD1
Port A Control
FD2
Port A Input Data
Note: XX = Undefined.
Mnemonic Reset (Hex)
DMA0H
XX
DMA0START
XX
DMA0END
XX
DMA1CTL
00
DMA1IO
XX
DMA1H
XX
DMA1START
XX
DMA1END
XX
DMAA_ADDR
XX
DMAACTL
00
DMAASTAT
00
IRQ0
00
IRQ0ENH
00
IRQ0ENL
00
IRQ1
00
IRQ1ENH
00
IRQ1ENL
00
IRQ2
00
IRQ2ENH
00
IRQ2ENL
00
—
XX
IRQES
00
IRQPS
00
IRQCTL
00
PAADDR
00
PACTL
00
PAIN
XX
Page
155
156
156
153
154
155
156
156
157
158
159
51
55
55
53
56
56
54
58
58
60
60
61
40
41
46
PS019924-0113
PRELIMINARY
Register File Address Map