Z8F4822AR020SG Datasheet, PDF (239/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
219
On-Chip Debugger Timing
Figure 52 and Table 117 provide timing information for the DBG pin. The DBG pin tim-
ing specifications assume a 4 µs maximum rise and fall time.
TCLK
X_IN
DBG
(Output)
DBG
(Input)
T1
T2
Output Data
T3
T4
Input Data
Figure 52. On-Chip Debugger Timing
Table 117. On-Chip Debugger Timing
Parameter
DBG
T₁
T₂
T₃
T₄
Abbreviation
X_IN Rise to DBG Valid Delay
X_IN Rise to DBG Output Hold Time
DBG to X_IN Rise Input Setup Time
DBG to X_IN Rise Input Hold Time
DBG frequency
Delay (ns)
Minimum
Maximum
–
30
2
–
10
–
5
–
System Clock/4
PS019924-0113
PRELIMINARY
AC Characteristics