Z8F4822AR020SG Datasheet, PDF (237/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
217
General-Purpose I/O Port Input Data Sample Timing
Figure 50 displays timing of the GPIO Port input sampling. Table 115 lists the GPIO port
input timing.
System
Clock
TCLK
GPIO Pin
Input Value
Port Value
Changes to 0
GPIO Input
Data Latch
GPIO Data
Read on Data Bus
0 Latched
Into Port Input
Data Register
GPIO Data Register
Value 0 Read
by eZ8 CPU
Figure 50. Port Input Sample Timing
Table 115. GPIO Port Input Timing
Parameter
T_{S_PORT}
T_{H_PORT}
T_SMR
Abbreviation
Port Input Transition to X_IN Fall Setup Time (not pictured)
X_IN Fall to Port Input Transition Hold Time (not pictured)
GPIO Port Pin Pulse Width to Insure Stop Mode Recovery (for
GPIO Port pins enabled as SMR sources)
Delay (ns)
Min
Max
5
–
6
–
1 s
PS019924-0113
PRELIMINARY
AC Characteristics