Z8F4822AR020SG Datasheet, PDF (264/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
244
Op Code Maps
A description of the op code map data and the abbreviations are provided in Figure 59 and
Table 137. Figures 60 and 61 provide information about each of the eZ8 CPU instructions.
Op Code
Lower Nibble
Fetch Cycles
Instruction Cycles
4
Opcode
Upper Nibble
A
3.3
CP
R2,R1
First Operand
After Assembly
Second Operand
After Assembly
Figure 59. Op Code Map Cell Description
Table 137. Op Code Map Abbreviations
Abbreviation
b
cc
X
DA
ER
Description
Bit position
Condition code
8-bit signed index or displacement
Destination address
Extended addressing register
Abbreviation Description
IRR
Indirect register pair
p
Polarity (0 or 1)
r
4-bit working register
R
8-bit register
r1, R1, Ir1, Irr1, Destination address
IR1, rr1, RR1,
IRR1, ER1
PS019924-0113
PRELIMINARY
Op Code Maps