Z8F4822AR020SG Datasheet, PDF (11/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
xi
List of Figures
Figure 1. Z8 Encore! XP F64xx Series Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 2. Z8 Encore! XP F64xx Series in 40-Pin Dual Inline Package (PDIP) . . . . . . 8
Figure 3. Z8 Encore! XP F64xx Series in 44-Pin Plastic Leaded Chip Carrier (PLCC) 9
Figure 4. Z8 Encore! XP F64xx Series in 44-Pin Low-Profile Quad Flat 
Package (LQFP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Z8 Encore! XP F64xx Series in 64-Pin Low-Profile Quad Flat 
Package (LQFP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Z8 Encore! XP F64xx Series in 68-Pin Plastic Leaded Chip 
Carrier (PLCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Z8 Encore! XP F64xx Series in 80-Pin Quad Flat Package (QFP) . . . . . . . 13
Figure 8. Power-On Reset Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 9. Voltage Brown-Out Reset Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 10. GPIO Port Pin Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 11. Interrupt Controller Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 12. Timer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Figure 13. UART Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Figure 14. UART Asynchronous Data Format without Parity . . . . . . . . . . . . . . . . . . . 89
Figure 15. UART Asynchronous Data Format with Parity . . . . . . . . . . . . . . . . . . . . . . 89
Figure 16. UART Asynchronous MULTIPROCESSOR Mode Data Format . . . . . . . 93
Figure 17. UART Driver Enable Signal Timing (shown with 1 Stop Bit and Parity) . 95
Figure 18. UART Receiver Interrupt Service Routine Flow . . . . . . . . . . . . . . . . . . . . 97
Figure 19. Infrared Data Communication System Block Diagram . . . . . . . . . . . . . . 109
Figure 20. Infrared Data Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Figure 21. Infrared Data Reception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Figure 22. SPI Configured as a Master in a Single-Master, Single-Slave System . . . 113
Figure 23. SPI Configured as a Master in a Single-Master, Multiple-Slave System . 114
Figure 24. SPI Configured as a Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Figure 25. SPI Timing When PHASE is 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Figure 26. SPI Timing When PHASE is 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Figure 27. I²C Controller Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Figure 28. 7-Bit Address Only Transaction Format . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Figure 29. 7-Bit Addressed Slave Data Transfer Format . . . . . . . . . . . . . . . . . . . . . . 134
Figure 30. 10-Bit Address Only Transaction Format . . . . . . . . . . . . . . . . . . . . . . . . . 135
PS019924-0113
PRELIMINARY
List of Figures