Z8F4822AR020SG Datasheet, PDF (50/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
30
Power-On Reset
Each device in the Z8 Encore! XP F64xx Series contains an internal Power-On Reset cir-
cuit. The POR circuit monitors the supply voltage and holds the device in the Reset state
until the supply voltage reaches a safe operating level. After the supply voltage exceeds
the POR voltage threshold (V_POR), the POR Counter is enabled and counts 66 cycles of
the Watchdog Timer oscillator. After the POR counter times out, the XTAL Counter is
enabled to count a total of 16 system clock pulses. The devices are held in the Reset state
until both the POR Counter and XTAL counter have timed out. After the Z8 Encore! XP
F64xx Series devices exit the Power-On Reset state, the eZ8 CPU fetches the Reset vector.
Following Power-On Reset, the POR status bit in the Watchdog Timer Control
(WDTCTL) Register is set to 1.
Figure 8 displays Power-On Reset operation. For the POR threshold voltage (V_POR), see
the Electrical Characteristics chapter on page 200.
V_POR
V_VBO
V_CC = 0.0 V
WDT Clock
Primary
Oscillator
Internal RESET
signal
V_CC = 3.3V
Program
Execution
Oscillator
Start-up
POR
counter delay
XTAL
counter delay
Figure 8. Power-On Reset Operation
PS019924-0113
PRELIMINARY
Reset Sources